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september 2015 docid028240 rev 1 1 / 14 this is information on a product in full production. www.st.com STL20NF06LAG automotive - grade n - channel 60 v, 2 7 m typ., 20 a stripfet? ii power mosfet in a powerflat? 5x6 package datasheet - production data figure 1 : internal schematic diagram features order code v ds r ds(on) max. i d p tot STL20NF06LAG 60 v 40 m 20 a 75 w ? designed for automotive applications and aec - q101 qualified ? powerflat? 5x6 with wettable flanks ? logic level v gs(th) ? maximum junction temperature: t j = 175 c applications ? switching applications description this power mosfet series realized with stmicroelectronics unique stripfet? process is specifically designed to minimize input capacitance and gate charge. it is therefore ideal as a pri mary switch in advanced high - efficiency isolated dc - dc converters for telecom and computer applications. it is also suitable for any application with low gate charge drive requirements. table 1: device summary order code marking package packing STL20NF06LAG 20nf06l powerflat? 5x6 t ape and reel 5 6 7 8 1 2 3 4 t op v iew d(5, 6, 7, 8) g(4) s(1, 2, 3)
contents STL20NF06LAG 2 / 14 docid028240 rev 1 contents 1 electrical ratings ................................ ................................ ............. 3 2 e lectrical characteristics ................................ ................................ 4 2.1 electrical characteristics (curves) ................................ ...................... 6 3 test circuits ................................ ................................ ..................... 8 4 package information ................................ ................................ ....... 9 4.1 powerflat? 5x6 wf type r pa ckage information .......................... 9 4.2 powerflat? 5x6 wf packing information ................................ .... 11 5 revision history ................................ ................................ ............ 13
STL20NF06LAG electrical ratings docid028240 rev 1 3 / 14 1 electrical ratings table 2: absolute maximum ratings symbol parameter value unit v ds drain - source voltage 60 v v gs gate - source voltage 20 v i d (1) (2) drain current (continuous) at t case = 25 c 20 a drain current (continuous) at t case = 100 c 20 i dm (1) (3) drain current (pulsed) 80 a i d (4) drain current (continuous) at t pcb = 25 c 7.4 a drain current (continuous) at t pcb = 100 c 5.2 i dm drain current (pulsed) 29.6 a p tot total dissipation at t case = 25 c 75 w p tot total dissipation at t pcb = 25 c 4.8 t stg storage temperature - 55 to 175 c t j operating junction temperature notes: (1) this value is rated according to r thj - c . (2) current limited by package. (3) pulse width is limited by safe operating area. (4) this value is rated according to r thj - pcb . table 3: thermal data symbol parameter value unit r thj - case thermal resistance junction - case 2.0 c/w r thj - pcb (1) thermal resistance junction - pcb 31.3 notes: (1) when mounted on a 1 - inch2 fr - 4, 2 oz copper board, t < 10 s. table 4: avalanche characteristics symbol parameter value unit i av avalanche current, not repetitive 7.4 a e as (1) single pulse avalanche energy 210 mj notes: (1) starting t j = 25 c, i d = i av .
electrical characteristics STL20NF06LAG 4 / 14 docid028240 rev 1 2 electrical characteristics (t case = 25 c unless otherwise specified) table 5: static symbol parameter test conditions min. typ. max. unit v (br)dss drain - source breakdown voltage v gs = 0 v, i d = 250 a 60 v i dss zero gate voltage drain current v gs = 0 v, v ds = 60 v 1 a v gs = 0 v, v ds = 60 v, t c = 125 c 100 a i gss gate - body leakage current v ds = 0 v, v gs = 20 v 10 0 n a v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 1 2.5 v r ds(on) static drain - source on - resistance v gs = 10 v, i d = 4 a 2 7 40 m v gs = 5 v, i d = 4 a 32 50 table 6: dynamic symbol parameter test conditions min. typ. max. unit c iss input capacitance v ds = 25 v, f = 1 mhz, v gs = 0 v - 670 - pf c oss output capacitance - 170 - c rss reverse transfer capacitance - 56 - q g total gate charge v dd = 25 v, i d = 7.4 a, v gs = 10 v (see figure 15: "gate charge test circuit" ) - 22. 5 - nc q gs gate - source charge - 2. 5 - q gd gate - drain charge - 7 - table 7: switching times symbol parameter test conditions min. typ. max. unit t d(on) turn - on delay time v dd = 30 v, i d = 3.7 a r g = 4.7 , v gs = 10 v (see figure 14: "switching times test circuit for resistive load" and figure 19: "switching time waveform" ) - 7 - ns t r rise time - 15.4 - t d(off) turn - off delay time - 36.8 - t f fall time - 7.7 -
STL20NF06LAG electrical characteristics docid028240 rev 1 5 / 14 table 8: source - drain diode symbol parameter test conditions min. typ. max. unit i sd source - drain current - 7.4 a i sdm (1) source - drain current (pulsed) - 29.6 a v sd (2) forward on voltage v gs = 0 v, i sd = 7.4 a - 1.5 v t rr reverse recovery time i sd = 7.4 a, di/dt = 100 a/s, v dd = 48 v (see figure 16: "test circuit for inductive load switching and diode recovery times" ) - 28 ns q rr reverse recovery charge - 31.6 nc i rrm reverse recovery current - 2.26 a notes: (1) pulse width is limited by safe operating area. (2) pulse test: pulse duration = 300 s, duty cycle 1.5%.
electrical characteristics STL20NF06LAG 6 / 14 docid028240 rev 1 2.1 electrical characteristics (curves) figure 2 : safe operating area figure 3 : thermal impedance figure 4 : output characteristics figure 5 : transfer characteristics figure 6 : gate charge vs gate - source voltage figure 7 : static drain - source on - resistance
STL20NF06LAG electrical characteristics docid028240 rev 1 7 / 14 figure 8 : capacitance variations figure 9 : normalized gate threshold voltage vs temperature figure 10 : normalized on - resistance vs temperature (vgs = 5 v) figure 11 : normalized on - resistance vs temperature (vgs = 10 v) figure 12 : normalized v(br)dss vs temperature figure 13 : source - drain diode forward characteristics
test circuits STL20NF06LAG 8 / 14 docid028240 rev 1 3 test circuits figure 14 : switching times test circuit for resistive load figure 15 : gate charge test circuit figure 16 : test circuit for inductive load switching and diode recovery times figure 17 : unclamped inductive load test circuit figure 18 : unclamped inductive waveform figure 19 : switching time waveform
STL20NF06LAG package information docid028240 rev 1 9 / 14 4 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 4.1 powerflat? 5x6 wf type r package information figure 20 : powerflat? 5x6 wf type r package outline
package information STL20NF06LAG 10 / 14 docid028240 rev 1 table 9: powerflat? 5x6 wf type r mechanical data dim. mm min. typ. max. a 0.80 1.00 a1 0.02 0.05 a2 0.25 b 0.30 0.50 d 5.00 5.20 5.40 e 6.20 6.40 6.60 d2 4.11 4.31 e2 3.50 3.70 e 1.27 l 0.70 0.90 l1 0.275 k 1.275 1.575 e3 2.35 2.55 e4 0.40 0.60 e5 0.08 0.28 figure 21 : powerflat? 5x6 recommended footprint (dimensions are in mm)
STL20NF06LAG package information docid028240 rev 1 11 / 14 4.2 powerflat? 5x6 wf packing information figure 22 : powerflat? 5x6 wf tape figure 23 : powerflat? 5x6 package orientation in carrier tape
package information STL20NF06LAG 12 / 14 docid028240 rev 1 figure 24 : powerflat? 5x6 reel
STL20NF06LAG revision history docid028240 rev 1 13 / 14 5 revision history table 10: document revision history date revision changes 28 - sep - 2015 1 first release.
STL20NF06LAG 14 / 14 docid028240 rev 1 important notice C please read carefully stmicroelectronics nv and its subsidiaries (st) reserve the right to make changes, corrections, enhancements, modifications , and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant information on st products before placing orders. st products are sold pursuant to sts terms and conditions of sale in place at the time of or der acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and s t assumes no liability for application assistance or the design of purchasers products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information se t forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2015 stmicroelectronics C all rights reserved

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